When using Intel® Stratix® 10 Serial Mailbox Client IP, you will observe incorrect data is being sent to the flash when you are sending data using "WRITEDATA_0" and "WRITEDATA_1" register. The reason is the the byte ordering is in little-endian format. This will be the same as performing read data operation.
Based on the SPI interface protocol, MSB is being send or received when the data is being transmitted. So each byte will be stored from LSB to MSB of the "READDATA_0", "READDATA_1", "WRITEDATA_0" and "WRITEDATA_1". In other word, the data in the register will transmit LSB Byte to MSB Byte of the read or write data register.