Device Family: Intel® Stratix® 10

Type: Answers


Version Found: v18.1
Bug ID: FB: 586867;
IP: Altera S10 Configuration Clock

Why do my data send to NOR Flash incorrect when I am using OPCODE command in Intel® Stratix® 10 Serial Flash Mailbox Client IP?

Description

When using Intel® Stratix® 10 Serial Mailbox Client IP, you will observe incorrect data is being sent to the flash when you are sending data using "WRITEDATA_0" and "WRITEDATA_1" register. The reason is the the byte ordering is in little-endian format. This will be the same as performing read data operation.

Based on the SPI interface protocol, MSB is being send or received when the data is being transmitted. So each byte will be stored from LSB to MSB of the "READDATA_0", "READDATA_1", "WRITEDATA_0" and "WRITEDATA_1". In other word, the data in the register will transmit LSB Byte to MSB Byte of the read or write data register.

Workaround/Fix

To resolved the issue, you will need to reverse the byte ordering of the 4 byte data on WRITEDATA_0 or WRITEDATA_1 register

Example- 4 Byte of data "0x11223344" is actually "0x44332211"