Device Family: Arria® V, Intel® Cyclone® 10, Cyclone® IV, Cyclone® V, Stratix® IV, Stratix® V

Intel Software: Quartus Prime Standard

Type: Answers

Area: Component


Last Modified: December 06, 2018
Version Found: v18.1
Bug ID: FB: 204061;

Why do I get the error “Error (176286): Found 2 SPI blocks in design” when using Serial Flash Loader Intel® FPGA IP and ASMI Parallel II Intel FPGA IP?

Description

This error may be seen if Serial Flash Loader IP and ASMI Parallel II IP is used together in the same design.  Both of Serial Flash Loader IP and ASMI Parallel II IP core require ASMI interface access. Therefore, by having both IPs in the same design would cause conflict during compilation as both IPs cannot access the ASMI block at the same time.

Workaround/Fix

To work around this problem, follow the steps below:

  1. Turn ON the “Share ASMI interface in the design” check box in Serial Flash Loader IP parameter.
  2. Turn ON the “Disable dedicated Active Serial Interface” check box in ASMI Parallel II IP parameter.
  3. Route ASMI signals from the ASMI Parallel II IP and connect to the Serial Flash Loader IP ASMI input/output port.

Hence, both IPs should be able to share the single ASMI block within Serial Flash Loader IP.