When the Intel® Stratix® 10 Chip ID IP core is taken out of reset in user mode, you may see no output on the 'chip_id' port even after the assertion of 'data_valid' signal. This may be seen with designs compiled in Intel Quartus® Prime Pro software version 17.1.
Device Family: Intel® Stratix® 10
Intel Software: Quartus Prime Pro
Type: Answers
Area: Component
Last Modified: May 09, 2018
Version Found: v17.1
Version Fixed: v18.0
Bug ID: FB: 554718;
IP: Altera Unique Chip ID
Why does the Intel® Stratix® 10 Chip ID IP core read all zeros in user mode?
Description
Workaround/Fix
To read out the unique chip ID from Intel Stratix 10 devices
- Assert reset initially to reset the chip ID IP core.
- Trigger a high -> low transition on the 'readid' port to initiate one read command to the IP core.
- Use the 'readid' port to trigger multiple reads in user mode.
This problem has been fixed in Intel Quartus Prime Pro software version 18.0.