Yes, due to a known problem in Intel® Quartus® Prime Pro software version 17.1 update 2 or earlier, when 3V IOs in Intel Stratix® 10 FPGAs are assigned to a static GND in the design, you may see an inversion at the output pin.
3V IOs are located in IO banks 6A,6B,6C,7A,7B,7C and are available in different density and package variants of Intel Stratix 10 devices.