Device Family: Intel® Arria® 10, Intel® Stratix® 10

Intel Software: Quartus Prime Pro

Type: Answers

Area: Component


Last Modified: December 26, 2018
Version Found: v18.0
Bug ID: FB: 565494;

Internal Error: Sub-system: PCC, File: /quartus/periph/pcc/pcc_module.cpp, Line: 1112

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition 18.0 and earlier, you may see this internal error when implementing a LVDS SERDES IP with Use external PLL option where its LVDS external ports ext_loaden and ext_fclk connect directly to top level.

Workaround/Fix

To work around the problem, connect both LVDS ext_loaden and ext_fclk to an external PLL.

This problem is scheduled to be fixed in a future release of Intel® Quartus® Prime Pro Edition software.