This update can only be used with MAX+PLUS II version 9.01, 9.02, or 9.03 for PCs or UNIX workstations. Do not use this update with any other version.
This update (MAX+PLUS II version 9.04) fixes a rare incorrect synthesis problem. This problem may affect a variety of designs, but is found most frequently in state machine designs. The problem does not affect MAX® 7000 designs unless you have turned on the Multi-Level Synthesis for MAX 5000/MAX 7000 Devices in the Global Project Logic Synthesis dialog box. If your design functions correctly on your printed circuit board or if your timing simulation is correct, you do not need to download this update.
If you have a question or problem that is not answered by the information provided here or in MAX+PLUS® II. Help, please inquire in the mySupport web site.