The Profiling Nios® II Systems design example shows different ways to measure the performance of a Nios II system by using the GNU Profiler, the timestamp interval timer component and the performance counter component. The GNU Profiler can be used to identify the areas of code that consume the most processor time. The interval timer and performance counter components can be used to analyze functional bottlenecks in the system.
This design is provided for the following Intel® development kits:
- Nios II Embedded Evaluation Kit, Cyclone® III Edition
- Embedded Systems Development Kit, Cyclone® III Edition
- Stratix® IV GX FPGA Development Kit
Using This Design Example
The use of this design is governed by, and subject to, the terms and conditions of the Intel FPGA Hardware Reference Design License Agreement.
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