- Dynamic power is defined as the total power subtract the static power (power measured with no clock applied)
- Fps = Frames per second
- mWs = Miliwatt seconds
In the five-accelerator system, each accelerator runs autonomously, processing one horizontal line at a time. When it finishes processing a line of the image, it acquires the next available line, and begins processing it. A hardware mutex is used to prevent multiple accelerators from acquiring the same line. Figure 1 shows a block diagram of the five-accelerator system.
Figure 1. Simplified Block Diagram of Five-Accelerator System
Run the Example
To download and run the Nios II Low-Power Design Example, perform the following steps:
- Download the .zip file containing the Nios II low-power design example.
- Extract the downloaded .zip file to a working directory on your computer.
- Connect power and USB cables to your Cyclone III Starter Kit, and connect the other end of the USB cable to one of your computers’ USB connectors. Turn on the power to the board.
- Open a Nios II Command Shell and change to the directory where you extracted the .zip file.
- Change to the directory "c3_power_c2h_0_accel/software_examples/app/accel_0_test"
- Type the command “./create_this_app” to create and build the software project.
- Type the command “nios2-configure-sof ../../../c3_power_proj.sof “ to configure the 65-nm FPGA on the Cyclone III Starter Kit board.
- Type the command “nios2-terminal” to open a terminal session.
- Type the command “make download-elf” to download and run the software on the Nios II processor.
The use of this design is governed by, and subject to, the terms and conditions of the Intel® Design Example License Agreement.
This will run the Nios II only (no accelerator) design. To run the Nios II plus one accelerator and Nios II plus five accelerators designs, repeat steps 5-9, replacing the path in step 5 with, "c3_power_c2h_1_accel" and "c3_power_c2h_5_accel" respectively.
The board will now print its clock frequency information and Mandelbrot performance measurements to the terminal session. You can measure the total power consumption of the FPGA core by measuring the voltage across a current sensing resistor on the board.
Refer to the Cyclone III FPGA Starter Kit User Guide for full instructions on accurately measuring and calculating FPGA core power consumption.
Design Examples Disclaimer
These design examples may only be used within Intel Corporation devices and remain the property of Intel. They are being provided on an “as-is” basis and as an accommodation; therefore, all warranties, representations, or guarantees of any kind (whether express, implied, or statutory) including, without limitation, warranties of merchantability, non-infringement, or fitness for a particular purpose, are specifically disclaimed. Intel expressly does not recommend, suggest, or require that these examples be used in combination with any other product not provided by Intel.