Implementing OFDM Modulation and Demodulation

Cyclic prefix insertion is commonly used in orthogonal frequency division multiplexing (OFDM) systems as a way to mitigate the effects of intersymbol-interference (ISI). It copies the end section of an inverse fast Fourier transform (IFFT) packet to the beginning of an OFDM symbol. Usually the length of the cyclic prefix is longer than the length of the dispersive channel to completely remove ISI. OFDM modulation therefore mostly revolves around cyclic prefix: OFDM modulation includes IFFT operation and cyclic prefix insertion; OFDM demodulation includes cyclic prefix removal and FFT operation.

Modern communications systems feature highly dynamic scalability, which often requires changing system parameters on-the-fly based on channel conditions and user quality of service (QoS) requirements. This design example demonstrates cyclic prefix insertion and removal for a reconfigurable OFDM system using the FFT Intel® FPGA intellectual property (IP) core. It supports run-time reconfiguration of FFT size and cyclic prefix size.

Key Features

The key features of the design example include:

  • Support for the most commonly used FFT sizes, 128, 256, 512, 1024, and 2048, corresponding to channel bandwidths of 1.25, 2.5, 5, 10, and 20 MHz
  • Support for fixed or run-time reconfigurable FFT size on a packet basis
  • Support for fixed or run-time reconfigurable cyclic prefix size on a packet basis
  • Support for arbitrary integer cyclic prefix size, as long as it is less than the maximum FFT size
  • Support for TDD operation; all control modules can be used on both transmission and reception data paths
  • Support for parameterization of data width, memory depth, FFT packet size width, and cyclic prefix port width


Figure 1 shows the block diagram of the top level integration of OFDM modulation and demodulation. The FFT core is clocked faster than the baseband data so that it can be shared, for instance, for FDD operation or by multiple antennas in MIMO systems. Figure 2 lists the I/O ports of the modulation and demodulation modules.

Figure 1. OFDM Modulation/Demodulation for a Single Antenna TDD System
Figure 2. I/O Port Signals


The download files for this design example include:

The use of this design is governed by, and subject to, the terms and conditions of the Intel Hardware Reference Design License Agreement.

The previous release of this design example can be found here:

The use of this design is governed by, and subject to, the terms and conditions of the Intel Hardware Reference Design License Agreement.


  • F. Kristensen, P. Neilson and A. Olssen, “Reduced transceiver-delay for OFDM systems,” IEEE Vehicular Technology Conference, VTC, Spring 2004.

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