Documentation: HardCopy III Devices

HardCopy III Device Handbook, Volumes 1, 2, and 3 (6 MB)

HardCopy III Device Handbook, Volume 1: Device Interfaces and Integration (ver 3.4, Mar 2012, 3 MB)

Section I. Device Core

Chapter 1. HardCopy III Device Family Overview (ver 3.2, Jan 2011, 297 KB)
Chapter 2. Logic Array Block and Adaptive Logic Module Implementation in HardCopy III Devices (ver 2.1, Jan 2011, 140 KB)
Chapter 3. DSP Block Implementation in HardCopy III Devices (ver 2.1, Jan 2011, 165 KB)
Chapter 4. TriMatrix Embedded Memory Blocks in HardCopy III Devices (ver 3.1, Jan 2011, 147 KB)
Chapter 5. Clock Networks and PLLs in HardCopy III Devices (ver 3.1, Jan 2011, 203 KB)

Section II. I/O Interfaces

Chapter 6. I/O Features for HardCopy III Device (ver 3.1, Jan 2011, 331 KB)
Chapter 7. External Memory Interfaces in HardCopy III Devices (ver 3.2, Mar 2012, 785 KB)
Chapter 8. High-Speed Differential I/O Interfaces and DPA in HardCopy III Devices (ver 3.2, Jan 2011, 737 KB)

Section III. Hot Socketing and Testing

Chapter 9. Hot Socketing and Power-On Reset in HardCopy III Devices (ver 2.1, Jan 2011, 262 KB)
Chapter 10. IEEE 1149.1 (JTAG) Boundary Scan Testing in HardCopy III Devices (ver 3.1, Jan 2011, 147 KB)

Section IV. Power and Thermal Management

Chapter 11. Power Mangement in HardCopy III Devices (ver 3.2, Jan 2011, 226 KB)

Section V. Packaging Information

Chapter 12. HardCopy III Device and Packaging Information (ver 3.1, Jan 2011, 114 KB)

HardCopy III Device Handbook, Volume 2: Design Flow and Prototyping (ver 3.3, Mar 2012, 2 MB)

Section I. HardCopy III Design Flow and Prototyping with Stratix III Devices

Chapter 1. HardCopy III Design Flow Using the Quartus II Software (ver 3.3, Mar 2012, 882 KB)
Chapter 2. HardCopy Design Center Implementation Process (ver 2.1, Jan 2011, 219 KB)
Chapter 3. Mapping Stratix III Device Resources to HardCopy III Devices (ver 3.3, Mar 2012, 271 KB)
Chapter 4. Matching Stratix III Power and Configuration Requirements with HardCopy III Devices (ver 3.2, Mar 2012, 504 KB)

HardCopy III Device Handbook, Volume 3: Datasheet and Addendum (ver 3.3, Mar 2012, 872 KB)

Section I. HardCopy III Device Datasheet

Chapter 1. DC and Switching Characteristics of HardCopy III Devices (ver 4.1, Dec 2011, 364 KB)
Chapter 2. Addendum: Extended Temperature Range for HardCopy III Devices (ver 1.0, Mar 2012, 136 KB)

Related Documentation

External Memory Interfaces

AN 550: Using the DLL Phase Offset Feature in Stratix FPGAs and HardCopy ASICs (ver 2.0, Mar 2010, 547 KB)
altmemphy_ext_dll.zip (48 KB)
altmemphy_int_dll.zip (47 KB)
static_dll.zip (18 KB)
External Memory PHY Interface (ALTMEMPHY) (nonAFI) Megafunction User Guide (ver 7.3, Jan 2010, 3 MB)

I/O Interfaces, Protocols and Signal Integrity

AN 477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 2.0, Jan 2010, 519 KB)
Input Signal Edge Rate Guidance (ver 1.0, Jun 2005, 63 KB)

Design Guidelines

AN 311: ASIC-to-FPGA Design Methodology and Guidelines (ver 3.1, Apr 2009, 286 KB)
AN 477: Designing RGMII Interface with FPGA and HardCopy Devices (ver 2.0, Jan 2010, 519 KB)
AN 658: Best Design Practices for HardCopy Devices (ver 1.1, Jul 2012, 799 KB)

End Applications

Altera FPGAs for radar and advanced sensors (ver 1.0, Oct 2007, 219 KB)

General Device Documentation

Altera FPGAs for radar and advanced sensors (ver 1.0, Oct 2007, 219 KB)
Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints (ver 1.2, Feb 2009, 459 KB)