Components & Interface:Audio: Iomic; Converter: AD, DA; Industry Standard: Ethernet
End Market: Broadcast, Industrial, Military, Test & Measurement, Wireless
Cyclone Series:Cyclone® IV: Cyclone® IV E
Board Feature:General User IO: Dip Rocker Switch, LED, Push Button
The UDPSDR-HF2 features a 16-bit ADC sampling at 122.88Msps. The HF2 is designed to be a front-end companion to the Intel® FPGA BeMicroSDK from Arrow Electronics. Together, the HF2 and BeMicroSDK form a complete high-performance 100kHz ? 55MHz Digital Down Conversion receiver. The high-performance UDPSDR-HF2 joins the UDPSDR-HF1 (14-bits@80Msps) receiver and the UDPSDR-TX2 transmitter (14-bits@210Msps) to round out the SDRstick family.
Contact email@example.com for RMA. Authorization required for returns.
N. Board is CE compliant but has not been tested. It is a piece of test equipment.
Conflict Mineral Policy Compliant
Test Plan Summary
FPGA image for BeMicroSDK to implement a complete 100kHz - 55MHz SDR receiver for use with HDSDR, PowerSDR, SDR# and GNU Radio software.
ISO 9000 & 9001
Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.