HMI System Solution: Guiliani + D/AVE 2D + CDC-200
Block Diagram
Overview
Driven by smart phones customers expect Smart HMIs on all kind of devices: Modern graphical control elements (widgets) combined with smooth animations on high-resolution touch-screen displays replace single-color segment displays and hard-keys. A reliable touch screen performance combined with an intuitive GUI design is a must.With the combination of the Guiliani HMI Framework, the D/AVE 2D graphics rendering core and the CDC-200 display controller, TES offers a ready-to-use, low-footprint and thus cost efficient solution for Smart HMIs on Intel® FPGAs and SoCs: http://tes-dst.com/tes-dst/index.php/hmi-tooling/guiliani--dave-2d-for-altera-fpgas?innerpage_style=1
Features
- Guiliani PC Editor and simulator for rapid HMI developments included
- Guiliani HMI Framework enabeling "smartphone-like" HMI (www.guiliani.de/en)
- State-of-the-art graphics featuring alpha-blending, anti-aliazing and sub-pixel accurate rendering with bilinear filtering
- Ready to use system-solution with GPU (D/AVE 2D) and Display Controller (CDC-200) IPs
- CPU and OS agnostig: Runs on NIOS® II without OS or ARM, e.g. under Linux
IP Quality Metrics
Basic | |
---|---|
Year IP was first released | 2012 |
Latest version of Quartus supported | 13.1 |
Altera Customer Use | |
IP has been successfully implemented in production with at least one customer | Y |
Deliverables | |
Customer deliverables include the following:
|
Y |
Any additional customer deliverables provided with IP | Guiliani SDK and PC Editor, example HMI project including source code |
Parameterization GUI allowing end user to configure IP | Y |
IP core is enabled for OpenCore Plus Support | Y |
Source language | VHDL |
Testbench language | VHDL |
Software drivers provided | Y |
Driver OS support | bare metal, Linux |
Implementation | |
User Interface | AXI; Avalon-MM |
IP-XACT Metadata included | N |
Verification | |
Simulators supported | Modeltech ModelSim, Cadence NCSim |
Hardware validated | Y. Altera Board Name NEEK, VEEK-MT, VEEK-MT C5 SoC |
Industry standard compliance testing performed | Y |
If yes, which test(s)? | Spyglass, Cadence HAL |
If yes, on which Altera device(s)? | CIII, CIV, CV |
If Yes, date performed | 10/01/2012 |
Interoperability | |
IP has undergone interoperability testing | Y |
Interoperability reports available | N |
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