Terasic Cyclone V SoC Development Kit with HSMC Connector (DE10-Standard)

From Terasic Inc.

Board Image

Block Diagram

Board Category: Development Kit

Components & Interface: Audio: Iomic; Converter: AD, DA; Expansion: Generic, HSMC; Industry Standard: Ethernet, PS2, RS232, USB Device; Video: Composite Input, VGA Output

End Market: Automotive, Broadcast, Computer & Storage, Consumer, Industrial, Medical, Military

Technology: ASIC Prototyping, DSP, Embedded Design, General Purpose, Interface Protocols

Cyclone Series: Cyclone® V: Cyclone® V SX

Board Feature: General User IO: 7 Segment Display, LED, Push Button, Slider Switch


The DE10-Standard Development Kit presents a robust hardware design platform built around the Intel® System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Intel SoC integrates an ARM*-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth interconnect backbone. The DE10-Standard development board includes hardware such as high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more.

Order Information

Ordering Code
P0493$350Buy Now

Development Kit Hardware Contents

  • 110K LEs; 925MHz; A Dual-Core ARMCortex-A9MPCore Processor;
  • 6 FPGA PPLs and 3 HPS PLLs; 3.125G Transceivers; MicroSD Card Socket
  • On-Board USB Blaster II; 64GB DDR3 SDRAM on FPGA; 1GB DDR3 SDRAM on HPS
  • One HSMC Connector; One LTC Connector; 24-bit VGA DAC; 128X64 dots LCD Module with Backlight
  • G-Sensor; 10/100/1000 Ethernet on HPS; Temperature Sensor on FPGA;

Development Kit Software Contents

  • Linus BSP (Board Support Package)
  • DE10-Standard Panel
  • DE10-Standard System Builder
  • DE10-Standard OpenCL BSP
  • OpenCV application

Support Document

File Name
doc-us-dsnbk-42-5505271707235-de10-standard-user-manual-sm.pdfDE10-Standard User Manual1.0

Board Quality Metrics

Latest version of Quartus supported 16.1
Required Collateral Available
User Guide Y
Board Schematics Y
Reliability / Quality Assurance

Defects per Million Opportunities (DPMO)

Parts per Million (PPM)
Board Policy
Return Material Authorization (RMA) Policy If you want to make a return, please write an email to us within 7 days after you’ve received the product. The product must be unopened. (If the package is damaged upon receipt, please take photos and inform us immediately.) For more details, please visit: RMA.Terasic.com
RoHS Compliant Y
CE Compliant N. N/A
Conflict Mineral Policy Compliant
Test Plan Summary

Reference Designs from System CD for customers to access all the peripherals on board.

Additional Compliance
ISO 9000 & 9001

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.