Interlaken from 1Gbps to 1,000Gbps

Block Diagram

Solution Type: IP Core

End Market: Broadcast, Computer & Storage, Industrial, Military, Test & Measurement, Wireline

Evaluation Method: Source Code

Technology: Interface Protocols: Interlaken

Arria Series: Intel® Arria® 10, Arria® V, Intel® Arria® 10 SoC, Arria® V SoC

Cyclone Series: Cyclone® V, Cyclone® V SoC

Stratix Series: Stratix® IV, Stratix® V

Segments: 

Supported Device Family: 

Solution Type: 

Overview

Tamba Networks offers a configurable Interlaken ILA and ILK core. The core is compliant with the Interlaken and Interlaken look=aside specifications, and targets FPGA operation.

Features

  • 1 to 32 Lanes
  • Lane Rate up to 56Gbps
  • Total Bandwidth up to 1,000Gbps

Device Utilization and Performance

Roughly proportional to bandwidth

Getting Started

RTL for design and simulation Test benches Data sheets Bring up guides

IP Quality Metrics

Basic
Year IP was first released2012
Latest version of Quartus supported15.1
Altera Customer Use
IP has been successfully implemented in production with at least one customerY
Deliverables

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim Altera edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file
N
Parameterization GUI allowing end user to configure IPN
IP core is enabled for OpenCore Plus SupportN
Source language
Verilog
Testbench languageVerilog
Software drivers providedN
Driver OS supportN/A
Implementation
User InterfaceAXI; Avalon-MM
IP-XACT Metadata includedY
Verification
Simulators supportedAll
Hardware validated Y. Altera Board Name Customer HW
Industry standard compliance testing performed
N
If No, is it planned?N
Interoperability
IP has undergone interoperability testing
Y
Interoperability reports available  N

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