From Sensor to Image GmbH

Request Evaluation

Documentation

GigE Vision FPGA Core

Block Diagram

Solution Type: IP Core

End Market: Automotive, Broadcast, Computer & Storage, Industrial, Medical, Military, Test & Measurement

Evaluation Method: OpenCore

Technology: Interface Protocols: Ethernet

Arria Series: Intel® Arria® 10, Arria® V

Cyclone Series: Cyclone® IV, Cyclone® V, Cyclone® V SoC

Segments:

Supported Device Family:

Solution Type:

Overview

Sensor to Image offers a set of FPGA IP cores to fasten up design of GigE Vision' compliant machine vision devices, e.g. cameras , but also receiving components like GigE framegrabbers.

Features

GEV DEVICE for FPGA camera design
GEV HOST for FPGA embedded receiver design as C implementation
GEV 1.2 and 2.x compliant
Speed 100Mbps to 10Gbps on copper as fiber
complete solution including frame buffer, memory interface, MAC unit and FPGA CPU C code

Device Utilization and Performance

see https://www.s2i.org/webdownload/Download/Datasheets/FPGA%20IP-Cores/GigECore%20Altera.pdf

Getting Started

see https://www.s2i.org/index.php/products-mainmenu-33/fpga-cores-mainmenu-67/core-test

IP Quality Metrics

Basic
Year IP was first released	2008
Latest version of Quartus supported	15.1
Altera Customer Use
IP has been successfully implemented in production with at least one customer	Y
Deliverables
Customer deliverables include the following: Design file (encrypted source code or post-synthesis netlist) Simulation model for ModelSim Altera edition Timing and/or layout constraints Testbench or design example Documentation with revision control Readme file	Y
Any additional customer deliverables provided with IP	AXI based frame buffer, MAC core
Parameterization GUI allowing end user to configure IP	Y
IP core is enabled for OpenCore Plus Support	N
Source language	VHDL
Testbench language	VHDL
Software drivers provided	Y
Driver OS support	bare metal, Linux, Win
Implementation
User Interface	AXI
IP-XACT Metadata included	N
Verification
Simulators supported	ModelSim
Hardware validated	Y. Altera Board Name INK, MVDK, Arria V GX Starter
Industry standard compliance testing performed	Y
If yes, which test(s)?	GEV by visiononline.org
If yes, on which Altera device(s)?	C IV/V, Arria V/10
If Yes, date performed	11/11/2016
Interoperability
IP has undergone interoperability testing	Y
Interoperability reports available	Y

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.

Find more DSN members

Find more DSN IP

Find more DSN boards