Ironwood Key Agreement Protocol for Cyclone V SoC

Block Diagram

Solution Type: IP Core

End Market: Automotive, Consumer, Industrial, Medical, Military, Wireless

Evaluation Method: Source Code

Technology: Basic Functions: Miscellaneous

Cyclone Series: Cyclone® V SoC


The Ironwood Key Agreement Protocol is implemented partially in HPS software and partially in FPGA programmable logic. The function is a Diffie-Hellman-like key agreement protocol that enables two parties to generate a shared secret over an open channel without any prior communication.


  • •\tPerforms a shared secret calculation in under 1ms
  • •\tMethod is resistant to all known Quantum computing attacks
  • •\tThe fastest shared secret computation endpoint can be assigned to whatever device the Cyclone V SoC is talking to

Device Utilization and Performance

For 128-bit security version of Ironwood: ALMs: 6,536 Registers: 7,233 Block memory bits: 260,864

Getting Started

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IP Quality Metrics

Year IP was first released2018
Latest version of Quartus supported18.0
Altera Customer Use
IP has been successfully implemented in production with at least one customerN

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim Altera edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file
Any additional customer deliverables provided with IP
Detailed protocol description
Parameterization GUI allowing end user to configure IPN
IP core is enabled for OpenCore Plus SupportN
Source language
Testbench languageVerilog
Software drivers providedY
Driver OS supportLinux
User InterfaceAvalon-MM
IP-XACT Metadata includedN
Simulators supportedModelSim
Hardware validated Y. Altera Board Name DE10-Nano (CV SoC Dev Kit)
Industry standard compliance testing performed
If No, is it planned?N
IP has undergone interoperability testing
Interoperability reports available  N

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