iPORT NTx-GigE Intellectual Property

Block Diagram

Solution Type: IP Core

End Market: Automotive, Industrial, Medical, Military, Test & Measurement, Wireline

Evaluation Method: OpenCore

Technology: Interface Protocols: Ethernet

Cyclone Series: Cyclone® V


Pleora's iPORT NTx-GigE Intellectual Property (IP) is a package of tools, reference designs, and expert design services that allows system and camera manufacturers to fully integrate GigE Vision connectivity in imaging devices. The iPORT NTx-GigE IP Core Package allows manufacturers to reduce overall system costs by creating Intel® Cyclone® V FPGA loads which fully integrate their logic with Pleora's iPORT NTx-GigE IP core. This FPGA load can be paired with custom hardware developed with the iPORT NTx-GigE Hardware Reference Design.Pleora's IP core platform increases flexibility and reduces costs for manufacturers by providing a straightforward design path to integrate their logic with the iPORT NTx-GigE IP Core in a custom FPGA load.


    Device Utilization and Performance

    Cyclone® V, pixel bus to GigE provided by Pleora, user defined to GigE Vision load created by customer based on Pleora IP Core Package, backup and main loads provided by Pleora, FPGA load licensable with iPORT Authorizer

    Getting Started

    The iPORT NTx-GigE Hardware Reference Design allows manufacturers to develop customized hardware based on the design of Pleora's iPORT NTx-GigE Embedded Video Interface hardware. The customized hardware can be paired with Pleora's off-the-shelf FPGA load, or with a customized FPGA load created with the iPORT NTx-GigE IP Core Package.

    IP Quality Metrics

    Year IP was first released2013
    Latest version of Quartus supported14.0
    Altera Customer Use
    IP has been successfully implemented in production with at least one customerY

    Customer deliverables include the following:

    • Design file (encrypted source code or post-synthesis netlist)
    • Simulation model for ModelSim Altera edition
    • Timing and/or layout constraints
    • Testbench or design example
    • Documentation with revision control
    • Readme file
    Any additional customer deliverables provided with IP
    BoM with key extended temperature components
    Parameterization GUI allowing end user to configure IPN
    IP core is enabled for OpenCore Plus SupportN
    Source language
    Testbench languageVerilog
    Software drivers providedY
    Driver OS supporteBUS SDK
    User InterfaceAvalon-MM
    IP-XACT Metadata includedN
    Simulators supportedModelSim
    Hardware validated Y. Altera Board Name Enclustra Mars AX3
    Industry standard compliance testing performed
    If No, is it planned?N
    IP has undergone interoperability testing
    Interoperability reports available  N

    Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.