XpressSWITCH
Block Diagram
Overview
XpressSWITCH is a customizable, multiport embedded Switch for PCIe designed for ASIC and FPGA implementations enabling the connection of one upstream port and multiple downstream ports and fully configurable. XpressSWITCH is the first embedded switch IP available on the market and enables designers to use fewer PCIe PHYs, saving latency, power consumption and bill-of-material.
Features
- 1 upstream port, up to 31 downstream ports Up to x16 link width per port Link rate of up to 16 Gbps
- (PIPE) 4.x compliant , Single Virtual Channel (VC) implementation, AER, ECRC, ARI, Hotplug
- Independent configuration of link width, link speed, equalization settings, and PIPE interface width per-PCIe port
- Peer-to-peer, Broadcast and Multicast, Round-Robin arbitration,
- No Packet buffering, Data Protection, Integrated Clock Domain Crossing
IP Quality Metrics
| Basic | |
|---|---|
| Year IP was first released | 2016 |
| Latest version of Quartus supported | 17.1 |
| Altera Customer Use | |
| IP has been successfully implemented in production with at least one customer | Y |
| Deliverables | |
Customer deliverables include the following:
|
Y |
| Parameterization GUI allowing end user to configure IP | Y |
| IP core is enabled for OpenCore Plus Support | N |
| Source language | Verilog |
| Testbench language | Verilog |
| Software drivers provided | Y |
| Driver OS support | Linux, WIndows |
| Implementation | |
| User Interface | Other: Other: Tx/Rx |
| IP-XACT Metadata included | N |
| Verification | |
| Simulators supported | PLDA |
| Hardware validated | Y. Altera Board Name ARRIA 10 DevKit |
| Industry standard compliance testing performed | N |
| If No, is it planned? | Y |
| Interoperability | |
| IP has undergone interoperability testing | Y |
| Interoperability reports available | N |
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