VF360 3U OpenVPX Air-cooled FPGA & DSP Processing module

From Parsec

Board Image

Block Diagram

Board Category: Development Kit

Components & Interface: Expansion: FMC; Industry Standard: Ethernet

End Market: Military

Technology: Cots

Stratix Series: Stratix® V: Stratix® V GX

Board Feature: General User IO: LED


The VF360 is a 3U OpenVPX module that leverages on Intel® Stratix® V FPGA andTexas Instruments KeyStone Multicore DSP technology to provide an ultra-highbandwidth processing platform, ideally suited for computation and bandwidthintensive applications such as Radar, Networking, SIGINT, EW, SDR and Video.The onboard multicore DSP from Texas Instruments provides the flexibility toperform complex post processing functions more suited for the processordomain. High bandwidth communication between the DSP and FPGA is providedthrough both PCIe and Serial Rapid IO (SRIO) interfaces.The Stratix® V FPGA has two banks of dedicated DDR3 and QDRII+ memories foralgorithms with high bandwidth and/or large memory size requirements. Highspeedserial interfaces to the OpenVPX data plane and the FMC site creates abundant FPGA IO throughput.The VF360 acts as an FMC carrier to provide a modular solution that accommodatesa wide range of I/O requirements.The VF360 conforms to the OpenVPX standard and operates as a Payloadmodule with System Controller capability. Both air-cooled and conduction cooledversions are available. Further flexibility is provided through build options to cater for10 different FPGAs from Intel FPGA's Stratix® V GX and GS device families.

Order Information

Ordering Code
VF360-A3-3I4-4-2-16-0-0$12900Buy Now

Development Kit Hardware Contents

  • VF360 3U OpenVPX AC module with Stratix® V GXA3 FPGA & 4-core DSP Processor

Development Kit Software Contents

  • VF360 Board Support Package with Linux distribution (drivers), Sample application and Firmware Reference Design

Support Document

File Name
doc-us-dsnbk-48-1104092401-vf360-um.pdfVF360 User Manual04

Board Quality Metrics

Latest version of Quartus supported 14.1
Required Collateral Available
User Guide N
Board Schematics N
Reliability / Quality Assurance

Defects per Million Opportunities (DPMO)

Parts per Million (PPM)
Board Policy
Return Material Authorization (RMA) Policy 12 months warranty
RoHS Compliant Y
CE Compliant N. CE testing not yet completed
Conflict Mineral Policy Compliant
Test Plan Summary

The Sample application tests all main functions, DDR & QDR memories, PCIe, SRIO & SERDES links \nFM500 companion FMC module with USB debug interfaces for FPGA and DSP (optional) \nVR300 companion Rear Transition module with USB debug interfaces for FPGA and DSP plus Ethernet (optional) \n3-slot OpenVPX Development Rack with power supply and fan (optional)

Additional Compliance
ISO 9000 & 9001

Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.