NOVPEK(TM)CV
Board Image
Block Diagram
Development Kit Hardware Contents
- Easy access to measure power consumption on each power rail of the FPGA and set the I/O voltage for general use banks.
- Evaluation and developing with every Intel� FPGA SoC HPS peripheral.
- Full multimedia implementation.
- Access to all the functions and features of the SoC.
- Demonstrating use of the FPGA Local Bus with external peripherals and the use of the FPGA high-speed bus.
Development Kit Software Contents
- VM with full Atlera tools and Linux implementation.
Support Document
| File Name | Description | Version |
|---|---|---|
| doc-us-dsnbk-96-5604412406-doc-us-dsnbk-96-5604412406-novpek-pb-js-june-2015.pdf | User Guide | 01 |
Board Quality Metrics
| Basic |
|
|---|---|
| Latest version of Quartus supported | 14.1 |
| Required Collateral Available | |
| User Guide | Y |
| Board Schematics | N |
| Reliability / Quality Assurance | |
Defects per Million Opportunities (DPMO) | 1 |
| Parts per Million (PPM) | 1 |
| Board Policy | |
| Return Material Authorization (RMA) Policy | RMA authorization will be provided prior to product return. |
| Compliance | |
| RoHS Compliant | Y |
| CE Compliant | N. This is a development board for lab use only. |
| Conflict Mineral Policy Compliant |
Y |
| Test Plan Summary | |
|
NovTech provides a test program that enables the customer to verify functionality. |
|
| Additional Compliance | |
| ISO 9000 & 9001; REACH compliant |
|
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