520 - FPGA Accelerator Card with Stratix 10 FPGA
Board Image
Block Diagram
Overview
Scalable compute node with optical I/O for creation of directly-coupled, dense FPGA clustersThe 520 is a PCIe accelerator card featuring Intel®s Stratix® 10 FPGA and designed to address a range of compute-intensive and latency- critical applications including Machine Learning, Gene Sequencing, Oil & Gas and real-time Network Analytics. Introducing ground-breaking single precision floating point performance of up to 10 TFLOPS per device, the OpenCL-programmable 520 features an Intel Stratix 10 FPGA and four banks of DDR4 external memory.
Development Kit Software Contents
- Built In Self Test (BIST) included and will be made available via support lounge at www.nallatech.com
- OpenCL HPC BSP included and will be made available via support lounge at www.nallatech.com (Includes 1 year access to updates)
Support Document
| File Name | Description | Version |
|---|---|---|
| doc-us-dsnbk-274-1806132911584-nallatech-520---product-brief-v2-1.pdf | 520 Data Sheet | 2.1 |
Board Quality Metrics
| Basic |
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|---|---|
| Latest version of Quartus supported | 17.0 |
| Required Collateral Available | |
| User Guide | Y |
| Board Schematics | N |
| Reliability / Quality Assurance | |
Defects per Million Opportunities (DPMO) | 0 |
| Parts per Million (PPM) | 0 |
| Board Policy | |
| Return Material Authorization (RMA) Policy | Hardware ships with 1 year warranty. Contact www.nallatech.com/support in case of failure to request an RMA number. |
| Compliance | |
| RoHS Compliant | Y |
| CE Compliant | N. CE Compliance can be achieved at system level integration. |
| Conflict Mineral Policy Compliant |
NULL |
| Test Plan Summary | |
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Hardware is shipped with Built-In-Self-Test (BIST) to exercise all features of the hardware and ensure they are fully functional. |
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| Additional Compliance | |
| ISO 9000 & 9001 |
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