IntelliProp SATA Bridge Platform (IPP-SA143A-BR)
Block Diagram
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Supported Device Family:
Solution Type:
Overview
The IntelliProp IPP-SA143A-BR, SATA Bridge Platform is an extensible IP Core which encompasses a SATA Device core, a SATA Host core, along with an embedded processor to handle bridging between these cores including system management interfaces outside of SATA scope. The bridging interface allows for data and command manipulation along with non-host initiated command generation and processing to the attached SATA device. The negotiated transfer rate of each SATA connection is independent of the other SATA connections allowing SATA 1.5Gb/s, SATA 3Gb/s, and SATA 6Gb/s hosts and devices to communicate at their maximum rates, or lower rates to minimize power consumption. Applications for the IPP-SA143A-BR include: controlling the flow of commands reorder of queues, for example write blocking; Encryption Bridge, Compression of data whereby less space is utilized on the drive; Allows for SATA-ATA drives to seamlessly represent themselves as SATA-ATAPI devices.
Features
- Independent host and device SATA speed negotiation.
- Software extensible bridging platformCommand set support for Windows, along with standard Linux discovery and communication.
- Boot Device Capable.
- Vendor Specific Command support (managed by firmware, supported in hardware).
- Optional: AES-XTS Encryption; and Hardware Datapath
IP Quality Metrics
| Basic | |
|---|---|
| Year IP was first released | 2016 |
| Latest version of Quartus supported | 16.1 |
| Altera Customer Use | |
| IP has been successfully implemented in production with at least one customer | Y |
| Deliverables | |
Customer deliverables include the following:
|
Y |
| Any additional customer deliverables provided with IP | Simulation script, sample vectors |
| Parameterization GUI allowing end user to configure IP | Y |
| IP core is enabled for OpenCore Plus Support | N |
| Source language | Verilog |
| Testbench language | Verilog |
| Software drivers provided | N |
| Driver OS support | n/a |
| Implementation | |
| User Interface | Avalon-MM |
| IP-XACT Metadata included | N |
| Verification | |
| Simulators supported | Modelsim |
| Hardware validated | Y. Altera Board Name Arria 10 |
| Industry standard compliance testing performed | N |
| If No, is it planned? | N |
| Interoperability | |
| IP has undergone interoperability testing | N |
| Interoperability reports available | N |
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