HTG-S500
Board Image
Block Diagram
Overview
Powered by Intel� Stratix� V FPGA, the HTG-S500 half-size PCI Express platform is ideal for applications requiring high bandwidth and low latency data processing between host servers and network interfaces used in data centers (i.e financial data processing).Supported by 40Gig Ethernet, PCI Express Gen3, DDR3, and QDR-II reference designs along with PCI Express Linux/Windows drivers, the HTG-S500 minimizes engineering efforts for complex design integration and verification.Availability of the HTG-S500 platform with different density of Stratix V FPGAs with the same device footprint allows easy design upgrade for different end applications.
Development Kit Software Contents
- PCI Express Controller
- DDR3 Controller
Support Document
| File Name | Description | Version |
|---|---|---|
| doc-us-dsnbk-193-5604432510-htg-s500-ug-rev1.pdf | User Manual | 1.0 |
Board Quality Metrics
| Basic |
|
|---|---|
| Latest version of Quartus supported | 15.1 |
| Required Collateral Available | |
| User Guide | Y |
| Board Schematics | N |
| Reliability / Quality Assurance | |
Defects per Million Opportunities (DPMO) | 10 |
| Parts per Million (PPM) | 10 |
| Board Policy | |
| Return Material Authorization (RMA) Policy | Customers can return the purchased printed circuit boards within 5 days from the invoice date in their original packages. All of our products meet the ISO9000 qualification requirements and are fully tested prior to shipment. However, we replace any non functional products. You must contact us first and obtain authorization prior to shipping otherwise the return will be void. |
| Compliance | |
| RoHS Compliant | Y |
| CE Compliant | Y. The board is CE compliant |
| Conflict Mineral Policy Compliant |
Y |
| Test Plan Summary | |
|
Board system, clock, power, PCI Express, and DDR3 tests |
|
| Additional Compliance | |
| ISO 9000 & 9001; REACH compliant |
|
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