Mini PCIE Fpga GPIO Card with EP4CGX15/EP4CGX30 Fpga
Board Image
Block Diagram
Overview
The mini PCIe FPGA board make easy to add in an embedded PC a powerfull I/O capability. It make able your SBC to interface many applications where customized interfaces are needed, such as in Electromedical, Industrial and Test equipments. The board is available in two versions with EP4CGX15BF14C7N or EP4CGX30BF14C6N Fpga. Using the Intel� PCIe IP and SGDMA you'll able able to perform continous DMA data up to 165Mbytes/sec (Half duplex) or 250Mbytes/Sec (Full Duplex).You can build your custom system by yourself starting from one of the SDK systems available.
Development Kit Software Contents
- -Executable Demo program (Pio Read and Write) under Linux and Windows
- -Fpga Configuration File with 7xPIO
Support Document
| File Name | Description | Version |
|---|---|---|
| doc-us-dsnbk-112-4512191211370-100801um-rev-b-pciem-15-io.pdf | PCIem-15-IO USER�S MANUAL | 1.2 |
Board Quality Metrics
| Basic |
|
|---|---|
| Latest version of Quartus supported | 16.1 |
| Required Collateral Available | |
| User Guide | Y |
| Board Schematics | N |
| Reliability / Quality Assurance | |
Defects per Million Opportunities (DPMO) | N/A |
| Parts per Million (PPM) | N/A |
| Board Policy | |
| Return Material Authorization (RMA) Policy | Units older than 10 years are considered no more repairable. Units under warranty are repaired without charges unless hardware fault is due to manumission or external causes. |
| Compliance | |
| RoHS Compliant | Y |
| CE Compliant | Y. 2011/65/ec |
| Conflict Mineral Policy Compliant |
Y |
| Test Plan Summary | |
|
Boundary Scan Test of all interconnections, including PCIE lanes. Dynamic Functional Tests with PIO FPGA system on Advantech MIO-5250 SBC |
|
| Additional Compliance | |
| ISO 9000 & 9001 |
|
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