Cyclone Series: Cyclone® IV, Cyclone® V, Cyclone® V SoC
MAX Series: Intel® MAX® 10, MAX® V
Stratix Series: Stratix® IV, Stratix® V
Supported Device Family:
The EP560 SD Slave Controller IP core provides the simplest way to design a Secure Digital (SD) or MultiMedia Card (MMC) device. It serves as a bridge between the SD bus and user's application logic inside the card. It contains many flexible design features that allows it to be easily integrated to any card applications. It supports SD memory, SDIO, SDHC, MMC and combo card functions.
Supports high speed mode up to maximum transfer rate of 25Mbyte/sec for SD and 50Mbyte/sec for MMC.
Compatible with SD/SDIO specification 2.0 with 1 and 4 bit data transfer.
Simple 32-bit bus master interface to DMA data into user memory space.
Selectable maximum block size from 512 to 16Kbytes.
Supports SD, SPI, SD Combo card, and optional 8-bit MMC bus protocol.
Device Utilization and Performance
For additional information, you can contact Eureka Technology, Inc. at:
Tel. (650) 960-3800
IP Quality Metrics
Year IP was first released
Latest version of Quartus supported
Altera Customer Use
IP has been successfully implemented in production with at least one customer
Customer deliverables include the following:
Design file (encrypted source code or post-synthesis netlist)
Simulation model for ModelSim Altera edition
Timing and/or layout constraints
Testbench or design example
Documentation with revision control
Parameterization GUI allowing end user to configure IP
IP core is enabled for OpenCore Plus Support
Software drivers provided
Driver OS support
IP-XACT Metadata included
Y. Altera Board Name Custom build board
Industry standard compliance testing performed
If yes, which test(s)?
If yes, on which Altera device(s)?
If Yes, date performed
IP has undergone interoperability testing
Interoperability reports available
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