Cyclone Series: Cyclone® IV, Cyclone® V, Cyclone® V SoC
MAX Series: Intel® MAX® 10, MAX® V
Stratix Series: Stratix® IV, Stratix® V
The DCAN FD is a standalone controller for the Controller Area Network (CAN), widely used in automotive and industrial applications. It conforms to Bosch CAN 2.0B specification (2.0B Active) and CAN FD (flexible data-rate).
The improved protocol overcomes standard CAN limits: data can be transmitted faster than with 1 Mbit/s and the payload (data field) is up to 64 byte long and limited to 8 byte anymore. When only one node is transmitting, the bit-rate can be increased, because no nodes need to be synchronized. Of course, before the transmission of the ACK slot bit, the nodes need to be re-synchronized.
The core has a simple CPU interface (8/16/32 bit configurable data width), with small or big endian addressing scheme. Hardware message filtering and 128 byte receive FIFO enable back-to-back message reception, with minimum CPU load. The DCAN FD is described at RTL level, allowing target use in FPGA or ASIC technologies.
Designed in accordance to ISO 11898-1:2015; Supports CAN 2.0B and CAN FD frames; Support up to 64 bytes data frames
Flexible data-rates supported; 8/16/32-bit CPU slave interface with small or big endianness; Simple interface allows easy connection to CPU
Supports both standard (11-bit identifier) and extended (29 bit identifier) frames; Data rate up to 8 Mbps; Hardware message filtering
128 byte receive FIFO and transmit buffer; Overload frame is generated on FIFO overflow; Normal & Listen Only Mode;
Single Shot transmission; Ability to abort transmission; Readable error counters; Last Error Code; Fully synthesizable
IP has been successfully implemented in production with at least one customer
Customer deliverables include the following:
Design file (encrypted source code or post-synthesis netlist)
Simulation model for ModelSim Altera edition
Timing and/or layout constraints
Testbench or design example
Documentation with revision control
Any additional customer deliverables provided with IP
Parameterization GUI allowing end user to configure IP
IP core is enabled for OpenCore Plus Support
Software drivers provided
Driver OS support
IP-XACT Metadata included
Y. Altera Board Name DE1, DE2
Industry standard compliance testing performed
If No, is it planned?
IP has undergone interoperability testing
Interoperability reports available
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