Cyclone Series: Cyclone® IV, Cyclone® V, Cyclone® V SoC
Stratix Series: Stratix® IV, Stratix® V
The Creonic DVB-S2X decoder is a silicon-proven, scalable
solution that allows for symbol rates of up to 100
MSymb/s on state-of-the-art FPGAs.
Device Utilization and Performance
-signal-to-noise ratio ranges from -9.6 to 19.8 dB
-throughput of up to 100 MSymb/s even for 256-APSK
Please contact Creonic Sales team!
IP Quality Metrics
Year IP was first released
Latest version of Quartus supported
Altera Customer Use
IP has been successfully implemented in production with at least one customer
Customer deliverables include the following:
Design file (encrypted source code or post-synthesis netlist)
Simulation model for ModelSim Altera edition
Timing and/or layout constraints
Testbench or design example
Documentation with revision control
Any additional customer deliverables provided with IP
Parameterization GUI allowing end user to configure IP
IP core is enabled for OpenCore Plus Support
Software drivers provided
Driver OS support
IP-XACT Metadata included
N. Altera Board Name Max10 IO dev Kit
Industry standard compliance testing performed
If No, is it planned?
IP has undergone interoperability testing
Interoperability reports available
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