O-RAN Solution

Block Diagram

Solution Type: IP Core

End Market: Test & Measurement, Wireless

Evaluation Method: OpenCore Plus

Technology: Interface Protocols: Communications

Arria Series: Intel® Arria® 10, Arria® V, Intel® Arria® 10 SoC, Arria® V SoC

Stratix Series: Intel® Stratix® 10, Stratix® IV, Stratix® V

Overview

Comcores offers a proven and feature-rich O-RAN RU implementation for plug-and-play deployment of this standard. The O-RU O-RAN IP is a fully scalable solution that enables both sub 6 GHz and mmWave applications and optionally supports features like compression and beamforming. The solution can be provided integrated with MAC, PCS and IEEE 1588 PTP IP’s. Likewise, a DFE including JESD204B/C interface can be provided for the antenna side. M-plane SW can be delivered for easy interfacing to CPU. The IP is interoperability tested with FlexRan and provides a solid method of enabling O-RAN.

Features

  • Support for up to four 25G Ethernet Links
  • Supports both TDD and FDD operations
  • Beamformer as an option
  • Supports wide variety of channel configurations
  • Compression available

Device Utilization and Performance

IP-DL ALM: 21603 Reg: 60213 M20K: 283

Getting Started

Please contact Comcores Sales for more info

IP Quality Metrics

Basic
Year IP was first released2020
Latest version of Quartus supported18.0
Altera Customer Use
IP has been successfully implemented in production with at least one customerY
Deliverables

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim Altera edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file
Y
Parameterization GUI allowing end user to configure IPN
IP core is enabled for OpenCore Plus SupportN
Source language
Verilog; VHDL
Testbench languageVerilog
Software drivers providedY
Driver OS supportLinux
Implementation
User InterfaceAXI
IP-XACT Metadata includedN
Verification
Simulators supportedSynopsys DC
Hardware validated Y. Altera Board Name Arria 10 SoC
Industry standard compliance testing performed
N
If No, is it planned?Y
Interoperability
IP has undergone interoperability testing
Y
Interoperability reports available  Y

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