520N
Board Image
Block Diagram
Overview
Introducing ground-breaking single precision floating point performance of up to 10 TFLOPS, the 520N is a PCIe board featuring an Intel Stratix 10 FPGA, along with four banks of DDR4 external memory. Four network ports enable dramatic FPGA-to-FPGA scaling independent of the PCIe bus, plus support for an array of serial I/O protocols operating up at 10/25/40/100GbE. Both traditional HDL and higher abstraction C, C++ and OpenCL-based tool flows are supported. Deliverables include an optimized board support package (BSP) for the Intel OpenCL SDK.
Development Kit Software Contents
- Optional OpenCL HPC Board Support Package (BSP)
- Built-In Self-Test for CentOS 7 provided with source code
- Intel High-Level Synthesis (C/C++) & Quartus Prime Pro (HDL, Verilog, VHDL, etc.)
Support Document
| File Name | Description | Version |
|---|---|---|
| doc-us-dsnbk-264-1106080312763-ds-520n.pdf | Datasheet | 1 |
Board Quality Metrics
| Basic |
|
|---|---|
| Latest version of Quartus supported | 18.0 |
| Required Collateral Available | |
| User Guide | Y |
| Board Schematics | N |
| Reliability / Quality Assurance | |
Defects per Million Opportunities (DPMO) | N/A |
| Parts per Million (PPM) | N/A |
| Board Policy | |
| Return Material Authorization (RMA) Policy | Contact BittWare |
| Compliance | |
| RoHS Compliant | Y |
| CE Compliant | Y. CE, FCC & ICES approvals |
| Conflict Mineral Policy Compliant |
Y |
| Test Plan Summary | |
|
Built-In Self-Test for CentOS 7 provided with source code (pinout, gateware, PCIe driver & host test application) |
|
| Additional Compliance | |
| ISO 9000 & 9001; FCC (Federal Communications Commission) |
|
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