EXP-F5200 - Embedded Suite B Cryptography Microprocessor
Block Diagram

Overview
The TeraFire® F5200 embedded cryptography microprocessor core is a fast, efficient microprocessor designed for public key and secret key cryptography applications. With an area footprint starting at 25K gates and nearly 300 RSA-1024 private key operations per second, the F5200 provides more than 10X greater performance than competitive solutions with similar area. With AES, SHA, and random number generator options, the F5200 is a single core solution for Suite B
Getting Started
Athena introduces the TeraFire® F5200 embedded cryptography microprocessor core, a fast, efficient microprocessor designed for public key and secret key cryptography applications. With an area footprint starting at ~2,700 ALUT’s and over 100 RSA-1024 private key operations per second, the F5200 provides more than 10× greater performance than competitive solutions with similar area. With AES, SHA, and random number generator options, the F5200 is a single core solution for Suite B cryptography.
IP Quality Metrics
Basic | |
---|---|
Year IP was first released | 2016 |
Latest version of Quartus supported | 15.1 |
Altera Customer Use | |
IP has been successfully implemented in production with at least one customer | Y |
Deliverables | |
Customer deliverables include the following:
|
Y |
Any additional customer deliverables provided with IP | By Request |
Parameterization GUI allowing end user to configure IP | N |
IP core is enabled for OpenCore Plus Support | N |
Source language | Verilog; VHDL |
Testbench language | Verilog; VHDL |
Software drivers provided | Y |
Driver OS support | Linux, OpenSSL |
Implementation | |
User Interface | AXI; Other: AHB |
IP-XACT Metadata included | N |
Verification | |
Simulators supported | all |
Hardware validated | Y. Altera Board Name Cyclone V, Stratix V, Arria 10 |
Industry standard compliance testing performed | Y |
If yes, which test(s)? | NIST CAVP |
If yes, on which Altera device(s)? | Cyclone V |
If Yes, date performed | 04/01/2016 |
Interoperability | |
IP has undergone interoperability testing | Y |
Interoperability reports available | N |
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