The Exact Match Search Engine (EMSE2) IP tracks supports Key-Value pairs in 40 Gigabit/second network using a combination of on-chip memory and off-chip DRAM.The EMSE2 tracks up to 12M key-value pairs. It can be used to match a key between 80 to 640 bits and return a data associated with each key. It also supports an aging mechanism to keep track of and delete inactive flows.The Algo-Logic's EMSE2 core has the unique ability to store an item along with each entry/key whereas a typical TCAM based system requires an additional memory lookup after a match address has been found. This item is returned along with the match, without an extra memory lookup, thus reducing the cost of the system.
Auto invalidation of aged out entries; provides notification for aged out entries.
Table depth: 48K using on-chip memory and 12M using off-chip memory.
Highly configurable cores: Width of key between 80 to 640 bits, value between 20 bytes to 52 bytes and table sizes from 768 to 12M entries.
High search rate: Up to 150 Million Searches Per Second (MSPS) per engine on on-chip memory.
Device Utilization and Performance
For 48K deep EMSE2 using on-chip memory, device utilization is on Stratix® V A7 device is:1. Total registers: 78562. Logic utilization: 7854 ALMs (2.81%)3. Block memory bits: 22308272 bits (8.17%)
Please visit http://algo-logic.com/emse2 for more information or contact firstname.lastname@example.org
IP Quality Metrics
Year IP was first released
Latest version of Quartus supported
Altera Customer Use
IP has been successfully implemented in production with at least one customer
Customer deliverables include the following:
Design file (encrypted source code or post-synthesis netlist)
Simulation model for ModelSim Altera edition
Timing and/or layout constraints
Testbench or design example
Documentation with revision control
Parameterization GUI allowing end user to configure IP
IP core is enabled for OpenCore Plus Support
Software drivers provided
Driver OS support
No CPU needed
Other: IP Specific
IP-XACT Metadata included
Modelsim Altera version
Y. Altera Board Name Terasic DE5-Net, Nallatech P385, Nallatech P385A
Industry standard compliance testing performed
If yes, which test(s)?
If yes, on which Altera device(s)?
Stratix V A7
If Yes, date performed
IP has undergone interoperability testing
Interoperability reports available
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