Exact Match Search Engine 2
Block Diagram

Overview
The Exact Match Search Engine (EMSE2) IP tracks supports Key-Value pairs in 40 Gigabit/second network using a combination of on-chip memory and off-chip DRAM.The EMSE2 tracks up to 12M key-value pairs. It can be used to match a key between 80 to 640 bits and return a data associated with each key. It also supports an aging mechanism to keep track of and delete inactive flows.The Algo-Logic's EMSE2 core has the unique ability to store an item along with each entry/key whereas a typical TCAM based system requires an additional memory lookup after a match address has been found. This item is returned along with the match, without an extra memory lookup, thus reducing the cost of the system.
Features
- Auto invalidation of aged out entries; provides notification for aged out entries.
- Table depth: 48K using on-chip memory and 12M using off-chip memory.
- Highly configurable cores: Width of key between 80 to 640 bits, value between 20 bytes to 52 bytes and table sizes from 768 to 12M entries.
- Operations: { Insert, Search, Modify, Delete Key, Delete RuleID, Read Rule ID }
- High search rate: Up to 150 Million Searches Per Second (MSPS) per engine on on-chip memory.
IP Quality Metrics
Basic | |
---|---|
Year IP was first released | 2013 |
Latest version of Quartus supported | 15.1 |
Altera Customer Use | |
IP has been successfully implemented in production with at least one customer | Y |
Deliverables | |
Customer deliverables include the following:
|
Y |
Parameterization GUI allowing end user to configure IP | N |
IP core is enabled for OpenCore Plus Support | N |
Source language | Verilog |
Testbench language | Verilog |
Software drivers provided | N |
Driver OS support | No CPU needed |
Implementation | |
User Interface | Other: IP Specific |
IP-XACT Metadata included | N |
Verification | |
Simulators supported | Modelsim Altera version |
Hardware validated | Y. Altera Board Name Terasic DE5-Net, Nallatech P385, Nallatech P385A |
Industry standard compliance testing performed | Y |
If yes, which test(s)? | iperf |
If yes, on which Altera device(s)? | Stratix V A7 |
If Yes, date performed | 09/17/2014 |
Interoperability | |
IP has undergone interoperability testing | Y |
Interoperability reports available | N |
Design Solutions Network Members provide products and/or services that are sold or licensed by the Member and not Altera or its affiliates. Altera and its affiliates hereby disclaim any express or implied warranty of any kind including warranties of merchantability, noninfringement of intellectual property, or fitness for any particular purpose with respect to any such products and/or services.