GEDEK (Ethernet Data Exchange Kit)
Block Diagram

Overview
IP Quality Metrics
Basic | |
---|---|
Year IP was first released | 2009 |
Latest version of Quartus supported | 15.1 |
Altera Customer Use | |
IP has been successfully implemented in production with at least one customer | Y |
Deliverables | |
Customer deliverables include the following:
|
Y |
Any additional customer deliverables provided with IP | Behavioral ETh model with file I/O, PC API (Linux & Windows), misc language examples (C, Borland, Po |
Parameterization GUI allowing end user to configure IP | Y |
IP core is enabled for OpenCore Plus Support | Y |
Source language | Verilog; VHDL |
Testbench language | VHDL |
Software drivers provided | Y |
Driver OS support | Linux, Windows |
Implementation | |
User Interface | Avalon-MM; Other: Avalon ST |
IP-XACT Metadata included | N |
Verification | |
Simulators supported | ModelSim Intel Edition, other simulators ok. |
Hardware validated | Y. Altera Board Name more than 10x different Intel & partners boards & Kits |
Industry standard compliance testing performed | N |
If No, is it planned? | N |
Interoperability | |
IP has undergone interoperability testing | Y |
Interoperability reports available | N |
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