- LDP = Label distribution protocol
- LIB = Label information base; table of labels mapping input port/label to output port/label
- CR-LDP = Constraint-based LDP, used for traffic engineering; resource reservation protocol traffic engineering (RSVP-TE) is another signaling mechanism used for traffic engineering
- Internet protocol (IP) FWD = Next hop forwarding based on IP address; longest match forwarding used
- TCP = Transmission control protocol
- MPLS FWD = Label switching based on MPLS label and LIB lookup
- UDP = User datagram protocol
Using Altera® devices and megafunctions for MPLS networks offers advantages in flexibility, time-to-market, a logic/processor solution, and ultimately, an overall cost reduction path.
System designers need flexibility when manufacturing MPLS systems to incorporate new value-added services. Because of the inherent risk that the services will not be adopted or will need modification while in the field, ASICs are not a viable platform for implementing MPLS. Altera’s FPGAs and intellectual property (IP) provide the flexibility to implement new proprietary features and perform remote in-field upgrades.
Many network equipment vendors continue to research and develop MPLS, and are competing to get to market first with an MPLS product that meets the requirements of Internet service providers. Altera provides programmable logic and IP cores for designers who cannot afford the turnaround times of ASICs. Altera's SoC devices, which feature the ARM® processors, and Altera's Nios® embedded processor can provide designers with time-to-market advantages.
MPLS requires a fast logic implementation for label swapping. At the same time, label management functions need to be implemented in software. MPLS lends itself to the combination of logic and processor solutions. Altera’s Excalibur devices allow complex algorithms to be implemented in software, and speed-critical operations to be implemented in logic on a single leading-edge FPGA.