The knowledge center is a one-stop shop where FPGA designers, high-level designers, and software developers can come to find all resources, collateral, and training to develop accelerators for the Acceleration Stack for Intel® Xeon® CPU with FPGAs.
FPGA designers can now develop accelerator functions using any hardware description language (HDL) (e.g. Verilog/VHDL). A great way to get started is to simply select a platform and use the provided FPGA Interface Manager to seemlessly integrate your accelerator function with the software framework and applications on Intel® Xeon® CPUs.
Software developers can make use of the Open Programmable Acceleration Engine software programming layer to develop libraries, frameworks, and applications that call accelerator functions implemented in FPGA hardware.