ID:21193 DSP block WYSIWYG primitive "<name>" clock "<name>" and clock "<name>" must be driven by the same clock source when you are using this preadder feature.

CAUSE: The specified DSP block WYSIWYG primitive clocks are driven by two separate sources for this preadder feature. This error is due to the hardware limitation for this family.

ACTION: Ensure that the clock parameter settings are similar.