ID:12476 Transceiver PLL "<name>" drives the xN clock network to bonded transmitter channels. The bonded span and/or data rate <number> exceeds the xN bonded mode beyond transmitter specification

CAUSE: The specified transceiver phase-locked loop (PLL) is using the xN transmitter clock network to feed one or more transmitter channels outside of its transceiver bank beyond the recommended bonded span and/or data rate.

ACTION: For data rate violations, use alternate clock network and bonding method by changing the transmitter PLL to use PLL feedback compensation bonding to avoid using the xN transmitter clock network. For bonded span violations, reduce the number of bonded channels to the recommended bonding span. For Stratix V, refer to the Stratix V Device Datasheet for the Clock Network Transmitter Specification and Stratix V Device Handbook: Transceiver Clocking chapter for "Data Rates and Spans Supported Using Stratix V Clock Sources and Clock Networks" table. For Arria V GZ, refer to the Arria V GZ Device Datasheet for the Clock Network Transmitter Specification and Arria V GZ Device Handbook: Transceiver Clocking chapter for "Characteristics of x1, x6, and xN Clock Lines for Arria V GZ Devices" table.