ID:15469 The SERDES receiver or transmitter atom "<name>" has one or more clock and enable ports that are not driven by a fast PLL

CAUSE: The specified SERDES receiver or transmitter atom has one or more clock and enable input ports that can be driven only by the sclkout and enable ports of a fast PLL. If you are using the MegaWizard Plug-In Manager , this error usually occurs when an external PLL has been selected for the SERDES receiver or transmitter atom, but the PLL has not been configured for LVDS with a combination of an sclkout port and an enable pin.

ACTION: Modify the design so that the clock and enable input ports of the SERDES receiver or transmitter atom has a valid source.