ID:14268 DSP block WYSIWYG primitive "<name>" uses dynamic signals for port <name> in <name> mode, but dynamic signals for port <name> is not supported for <name> mode in the target family

CAUSE: The specified DSP block WYSIWYG primitive was originally created for a different family and uses dynamic signals for the specified port for the specified mode, but dynamic signals for the specified port for the specified mode is not supported in the target family's DSP block. As a result, this WYSIWYG primitive cannot be remapped to the target family.

ACTION: Do not use DSP blocks with dynamic signals for the specified port for the specified mode. For example, do not use Verilog Quartus Mapping File (.vqm) files containing DSP blocks with dynamic signals for the specified port for the specified mode.