ID:14327 WYSIWYG RAM Primitive "<name>" has set the parameter ECC_PIPELINE_STAGE_ENABLED to TRUE, but does not use the output registers of the RAM primitive.

CAUSE: The specified WYSIWYG RAM primitive has the ECC_PIPELINE_STAGE_ENABLED parameter set to TRUE. This setting is supported only if the WYSIWYG RAM primitive makes use of its output registers.

ACTION: Modify your design to use the output registers or set the ECC_PIPELINE_STAGE_ENABLED parameter to FALSE on the specified WYSIWYG RAM primitive.