Platform Designer Generate Menu Generate HDL Command (Generate Menu) Opens the Generation dialog box, which allows you to choose options and then direct Platform Designer generate HDL files that the Quartus® Prime software includes in the compilation. Generate Testbench System (Generate Menu) (Platform Designer) You open the Generation dialog box in Platform Designer by clicking Generate > Generate Testbench System. Generate Example Design (Generate Menu) (Platform Designer) A selection of Altera IP cores include example designs that you can use or modify to replicate similar functionality in your own system. You must generate the example design HDL from the parameter editor before you can view or use the example. Show Instantiation Template (Generate Menu) (Platform Designer) Provides the top-level HDL definition of the Platform Designer system in either Verilog HDL or VHDL. This tab also displays VHDL component declarations.