NoC Assignment Editor (Assignments Menu)

For designs targeting Intel Agilex® 7 M-Series FPGAs only, you can open the NoC Assignment Editor by clicking Assignments > NoC Assignment Editor.

The NoC Assignment Editor allows you to make logical assignments for hard memory NoC-related blocks in your design. These assignments include grouping, connectivity, address mapping, and bandwidth requirements.

After making assignments in the NoC Assignment Editor, you click Save to store the assignments in the Intel Quartus Prime settings file (.qsf). You must successfully complete Analysis & Elaboration before using the NoC Assignment Editor.

Specify assignments on the following NoC Assignment Editor tabs:

  1. Group tab—specify the Group Name of the NoC initiators and targets.
  2. Connection tab—specify the connections between NoC initiators and targets or SSM elements.
  3. Attributes tab—specify address mapping, bandwidth requirements, and transaction sizes for each connection.

The tabs appear in order of priority. The assignments made on the Group tab affect the assignments available in the Connection tab. The assignments made on the Connection tab affect the assignments available in the Attributes tab.

Note: You must complete the assignments on each tab in order before data appears on the next tab.

The Intel® Quartus® Prime software dynamically validates changes that you make through the editor, and issues errors or warnings for invalid assignments.