I/O Intel® FPGA IP
I/O components include clock data recovery (CDR), Phase-Locked Loop (PLL) Definition, double data rate (DDR) Definition, gigabit transceiver block (GXB) Definition, LVDS receiver, LVDS transmitter, PLL reconfiguration, and remote update Intel® FPGA IP.
IP Catalog |
Intel® FPGA IP(s) |
Comments |
|---|---|---|
ALTASMI_PARALLEL |
altasmi_parallel |
Active serial memory interface parallel Intel® FPGA IP. |
ALTCLKCTRL |
altclkctrl |
Clock control block Intel® FPGA IP. |
ALTCLKLOCK |
altclklock |
Parameterized PLL Intel® FPGA IP. |
ALTDDIO_BIDIR |
altddio_bidir |
DDR bidirectional Intel® FPGA IP. |
ALTDDIO_IN |
altddio_in |
DDR input Intel® FPGA IP. |
ALTDDIO_OUT |
altddio_out |
DDR output Intel® FPGA IP. |
ALTDLL |
altdll |
delay-locked loop (DLL) Definition Intel® FPGA IP. |
ALTDQ |
altdq |
Data strobe Intel® FPGA IP. |
ATLDQS |
altdqs |
Parameterized bidirectional data strobe Intel® FPGA IP. |
ALTDQ_DQS |
atldq_dqs |
Parameterized data strobe Intel® FPGA IP. |
ALTGX |
altgx |
High-speed serial interface (HSSI) GXB Intel® FPGA IP. |
ALTIOBUF |
altiobuf_bidir |
Bidirectional I/O buffer Intel® FPGA IP. |
altiobuf_in |
Input I/O buffer Intel® FPGA IP. |
|
altiobuf_out |
Output I/O buffer Intel® FPGA IP. |
|
ALTLVDS_RX |
altlvds_rx |
LVDS receiver Intel® FPGA IP. |
ALTLVDS_TX |
altlvds_tx |
LVDS transmitter Intel® FPGA IP. |
ALTMEMPHY |
ALTMEMPHY |
External DDR Memory PHY interface Intel® FPGA IP. |
ALTOCT |
alt_oct |
on-chip termination (OCT) Definition Intel® FPGA IP. |
ALTPLL |
altpll |
Parameterized PLL Intel® FPGA IP. |
ALTPLL_RECONFIG |
altpll_reconfig |
Parameterized PLL reconfiguration Intel® FPGA IP. |
ALTREMOTE_UPDATE |
altremote_update |
Parameterized remote update Intel® FPGA IP. |
altstratixii_oct |
Parameterized OCT Intel® FPGA IP. |
|
ALTTEMP_SENSE |
alttemp_sense |
Temperature sensing diode (TSD) block Intel® FPGA IP. |
MAX® II oscillator |
altufm_osc |
Oscillator Intel® FPGA IP. |