Memory Intel® FPGA IP

Memory Compiler includes FIFO, RAM, ROM, and memory functions.

IP Catalog

Intel® FPGA IP(s)

Comments

ALTOTP

altotp

One-time-programmable (OTP) fuse block Intel® FPGA IP.

RAM initializer

altmem_init

RAM initialization from ROM Intel® FPGA IP.

FIFO

dcfifo

Parameterized dual-clock FIFO Intel® FPGA IP.

dcfifo_mixed_widths

Parameterized dual-clock mixed-widths FIFO Intel® FPGA IP.

scfifo

Parameterized single-clock FIFO Intel® FPGA IP.

Flash Memory

altufm_i2c

User flash memory Intel® FPGA IP with the inter-integrated circuit (I2C) interface protocol.

altufm_none

User flash memory Intel® FPGA IP (no interface protocol).

altufm_parallel

User flash memory Intel® FPGA IP with the parallel interface protocol.

altufm_spi

User flash memory Intel® FPGA IP with the serial peripheral interface (SPI) protocol.

RAM: 1-PORT

altdpram

Parameterized dual-port RAM Intel® FPGA IP.

altram*

Parameterized RAM Intel® FPGA IP.

altsyncram

Parameterized true dual-port RAM Intel® FPGA IP.

RAM: 2-PORT

altdpram

Parameterized dual-port RAM Intel® FPGA IP.

altsyncram

Parameterized true dual-port RAM Intel® FPGA IP.

lpm_ram_dq*

Parameterized RAM with separate input and output ports Intel® FPGA IP.

RAM: 3-PORT

alt3pram

Parameterized triple-port RAM Intel® FPGA IP.

ROM: 1-PORT

altrom*

Parameterized ROM Intel® FPGA IP.

altsyncram

Parameterized true dual-port synchronous RAM Intel® FPGA IP.

lpm_rom*

Parameterized ROM Intel® FPGA IP.

ROM: 2-PORT

altsyncram

Parameterized true dual-port synchronous RAM Intel® FPGA IP.

Shift register (RAM-based)

altshift_taps

Parameterized shift register with taps Intel® FPGA IP.