Truth Table/Functonality

The lpm_ram_dp function represents asynchronous memory or memory with synchronous inputs and/or outputs.

Synchronous Write to Memory (all inputs registered)
`wrclock`	`wrclken`	`wren`	Function
X	L	L	No change
not	H	H	No change
	L	X	No change
	H	X	The memory location pointed to by `wraddress[]` is loaded with `data[]`.

For devices with ESBs or EABs, the lpm_ram_dp Intel^® FPGA IP internally writes the data to memory while the write clock is low.

Synchronous Read from Memory
`wrclock`	`wrclken`	`wren`	Function
X	L	L	Device dependent
not	H	H	No change
	L	X	No change
	H	X	The `q[]` port outputs the contents of the memory location pointed to by `rdaddress[]`

Totally asynchronous memory operations occur when neither rdclock nor wrclock is connected.

Asynchronous Memory Operations
`wren`	Function
L	No change
H	The memory location pointed to by `wraddress[]` is loaded with `data[]` and controlled by `wren`. The output `q[]` is asynchronous and reflects the memory location pointed to by rdaddress.