Input Ports
Port Name |
Required |
Description |
Comments |
|---|---|---|---|
data[] |
Yes |
Data input to the csfifo. |
Input port LPM_WIDTH wide. |
wreq |
Yes |
Write request. |
|
rreq |
Yes |
Read request. |
|
clock |
Yes |
Positive-edge-triggered clock. |
|
clockx2 |
Yes |
Positive-edge-triggered clock operating at twice the frequency of clock. |
|
clr |
No |
Resets csfifo to empty. |
|
threshlevel[] |
No |
Level (number of words) that the threshold output signal asserts. |
Input port with width [CEIL(LOG2(LPM_NUMWORDS))-1..0]. |