Output Ports
Port Name  | 
Required  | 
Description  | 
Comments  | 
|---|---|---|---|
qa[]  | 
Yes  | 
Data output from the memory.  | 
Output port LPM_WIDTH wide. The qa[] and qb[] outputs are valid before and during the next rising edge of clock but may not be valid at other times.  | 
qb[]  | 
Yes  | 
Data output from the memory.  | 
Output port LPM_WIDTH wide. The qa[] and qb[] outputs are valid before and during the next rising edge of clock but may not be valid at other times.  | 
busy  | 
No  | 
Indicates that addressa is equal to addressb and that dataa is writing data.  |