Input Ports
Port Name |
Required |
Description |
Comments |
|---|---|---|---|
aclr |
No |
Asynchronous clear input. |
|
calibration_request |
Yes |
Specifies user request for calibration. |
Input port [OCT_BLOCK_NUMBER - 1..0] wide. |
calibration_wait |
No |
Clock cycles to wait before starting calibration after calibration request |
Input port [OCT_BLOCK_NUMBER - 1..0] wide. |
clken |
No |
Clock enable. |
|
clock |
No |
System clock. |
|
rdn |
Yes |
Pull-down reference resistors. |
Input port [OCT_BLOCK_NUMBER - 1..0] wide. |
rup |
Yes |
Pull-up reference resistors. |
Input port [OCT_BLOCK_NUMBER - 1..0] wide. |
s2pload |
Yes |
Signal pass-through. User-defined synchronization and generation. |
Input port [OCT_BLOCK_NUMBER - 1..0] wide. |
calibration_only_req |
No |
Enable calibration only. Different OCT can be enabled independently. |
Input port [OCT_BLOCK_NUMBER - 1..0] wide. |
shift_only_request |
No |
Enable shift independently. Different shift can be enabled independently. |
Input port [OCT_BLOCK_NUMBER - 1..0] wide. |