Performing a Gate-Level Functional Simulation with the Questa® - Intel® FPGA Edition Software
You can use the Questa® - Intel® FPGA Edition software, provided with the Intel® Quartus® Prime software, to perform a gate-level functional simulation of a VHDL or Verilog HDL design that contains Intel-specific components with the Questa® - Intel® FPGA Edition interface, or with command-line commands.
Note: Do not compile any of the
simulation model files in the /eda/sim_libdirectory. Simulation libraries for
Questa® - Intel® FPGA Edition are precompiled.