clear box feature Definition

A feature that generates a fully synthesizable Intel FPGA IP core or LPM function for use with EDA synthesis tools. With the clear box feature, EDA synthesis tools can fully synthesize and optimize designs with Intel FPGA IP cores or LPM functions. You can use the clear box feature in EDA simulation tools, however, this results in slower simulation times.

You can take advantage of the clear box feature by turning on Generate clear box netlist file instead of a default wrapper file (for use with supported EDA synthesis tools only) in the IP Catalog.