Avalon® Interface Definition

An Avalon® interface (port) is a group of signals that are used collectively to implement a Platform Designer interface. Avalon® Memory-Mapped ports connect Avalon® Memory-Mapped host ports and Avalon® Memory-Mapped agent ports. An Avalon® Memory-Mapped master port initiates transactions in a Platform Designer system, and an Avalon® Memory-Mapped agent port is the collection of memory mapped signal types used to respond to transfer requests.

Avalon® Streaming ports connect Avalon® Streaming source ports and Avalon® Streaming sink ports. Each port type includes a number of required signal types and can also include optional signal types, which are known as component specific signals. There are no naming requirements for the required signals; however, each signal must be assigned an Avalon® signal type so that it is interpreted correctly by the Platform Designer software. If a signal is assigned the name of a signal type, it is assumed to be of that type.

Avalon® ports do not connect together directly. Instead, Avalon® ports connect to system interconnect, which translates signals between host and agent ports or source and sink ports. The system interconnect for Avalon® memory mapped and streaming interfaces is quite different. For streaming interfaces, the interconnect creates a point-to-point connection between a source-sink pair. The interconnect for streaming interfaces is automatically optimized for the unidirectional flow of high-speed data.

For memory mapped interfaces, the system interconnect can be optimized to meet system requirements. Depending upon design requirements, adapters can be used to make trade-offs between size and performance, bandwidth and latency, or concurrency and resource use. For example, seldom accessed and low bandwidth components can be positioned on the far side of an adapter, where accesses to those components incurs a higher latency, and multiple hosts must contend for those components as a group. Using an adapter results in a system with lower resource usage and higher overall frequency because there are fewer destinations to arbitrate for and lower supported concurrency.

Both memory mapped and streaming interfaces can optionally use backpressure to stall a data transfer. An Avalon® memory mapped agent port asserts its waitrequest signal to indicate that it cannot accept data. Wait-states extend the read transfer and give an agent port one or more clock cycles to capture address and/or return valid readdata. Wait-states also decrease the throughput to an agent port. For example, a sustained sequence of transfers with zero wait-states can achieve a maximum of one transfer per clock cycle. With one wait-state, the maximum throughput is one transfer per two clock cycles.

If streaming interface supports backpressure, the sink port de-asserts ready to indicate that it cannot accept data. A READY_LATENCY parameter indicates the number of cycles from the time that ready is asserted until valid data can be written.